VXI Bus Automatic Test System Test Interface Design

Abstract: Based on the GPIB-VXI bus instrument, a test of dynamic signal distribution, dynamic pull-up and dynamic pre-processing for several large-scale electronic equipment tests was studied. It effectively solved the test platform against multiple complexities. The adaptation of the measured object.

Keywords: VXI bus ATSISP technology With the application of modern electronic technology in weapon systems, electronic equipment has many new changes in the number of varieties, technical complexity and security models, mainly in the variety of equipment, the number of small , high technical complexity, higher and higher requirements for detection and diagnosis. Dedicated test equipment is difficult to meet due to its single function and low cost-effectiveness. The emergence and rapid development of VXI instruments and its wide application in the field of testing have provided conditions for the development of high-performance general-purpose automatic test systems.

In a test system based on a VXI bus instrument, the test system usually needs an adapter for a plurality of measured objects (test combinations). And the more objects you measure, the more adapters you need. This structure is obviously not suitable for an in-vehicle test system that has dozens of combinations of complex electronic equipment. For this reason, this article uses the method of dynamically allocating test signals and test resources, and cooperates with the corresponding test cables, effectively solves this problem, and realizes a comprehensive test of each tested combination of a complex missile weapon system.

1 Test System Components The test system consists of an industrial PC, a VXI chassis, a programmable power supply, an intermediate frequency power supply, an oscilloscope, a test interface, a measured object, and other peripherals. The schematic diagram of the test system is shown in Figure 1.

VXI Chassis adopts 13-slot C-size chassis E8403A. It includes 192 channels of digital I/O, 64 channels of A/D, 16 channels of D/A, 256 channels of multiplexer (MUX), D20 system, waveform generator, multimeter and other resources. Provides the basic conditions for stimulating the UUT and testing the UUT response. Program-controlled power supply adopts HP66000 chassis and corresponding power supply module, and can output 8 different power supplies at the same time, providing DC power supply for UUT. The medium frequency power supply provides 200V/400Hz three-phase AC power to meet the special power requirements of some measured combinations. In order to make up for the shortage of VXI digital I/O resources, the control of the test interface is directly performed by the IPC. Therefore, in addition to host computers, monitors, and printers to provide test operating conditions, the IPC also includes a digital I/O card to provide control signals for the test interface, control the dynamic allocation of test signals, dynamic pull-up, and dynamic preprocessing. Wait.

The tested combination is connected to the test interface through a special test cable. In order to reduce the number of joints of each test cable as a whole, the test interface only dynamically allocates common VXI resources (such as A/D, D/A, digital I/O, etc.) without increasing the complexity of the test interface. , and distributed with AC and DC power in a 120-pin socket. For the D20 system and some digital I/O signals, only a few tested combinations are used, and no processing is required during the test process, and can be directly assigned to other test sockets. In this way, the redistribution of each resource to the UUT test port can be achieved through the test cable.

The multimeter, waveform generator and oscilloscope are connected to the UUT through 256 MUXes. Because the MUX itself has a flexible control function, its input and output channels are directly connected in parallel with the test cable.

2 Hardware configuration of test interface The test interface adopts a card (module) structure, which consists of a backplane and six signal pre-processing modules (four universal modules, one dedicated module, and one control module). The signal relationship between the modules is shown in Figure 2.

The control module completes the control of the dedicated module and the universal module, divides the signal sent from the industrial control computer into data, address and read/write control signals, and accesses and controls the corresponding module according to different addresses, and at the same time, realizes the test cable and the UUT. Hot-swappable, control modules also implement power control for each module. Therefore, the control module is mainly composed of data and address formation and drive circuits, address decoding circuits, power control circuits, and the like.

The dedicated module corresponds to the UUT. The special signal of UUT is processed to provide special excitation or necessary simulation load for UUT. If necessary, it can be designed according to the requirements of the measured object.

The dynamic allocation, dynamic pull-up and preprocessing of the test signals are done by the universal module. Out of the ten modules, the circuits are identical, including circuits for signal distribution, module signal processing, I/O signal processing, and necessary status display, as shown in Figure 3.

In the figure, AB, DB, and CB are the address, data, and read/write control signals from the control module, respectively. A/D, D/A, and I/O are VXI bus system resources.

ispLSI1032 is used to receive the command sent by the control module, decode the command, and drive the related circuit work. The signal distribution circuit is mainly composed of a relay array and related drive circuits. Through the switching of relay contacts, the distribution of signals to A/D, D/A, digital I/O and other VXI resources is realized. The analog signal processing circuit includes program-controlled amplification/attenuation, filtering, AC/DC conversion and other circuits, preprocessing the analog response signal from the UUT, and conditioning to a range suitable for the A/D module measurement. Digital I/O signal processing circuits include input/output and output drive (pull-up) controls to meet the specific requirements of certain UUT digital excitations for driving.

In order to improve the reliability of the test interface and simplify its structure, the signal distribution circuit adopts a "two-select one" multiplex switch mode, and the module signal processing circuit also involves only some channels. Therefore, the signal distribution on the test port is not arbitrary. When testing a specific combination, the secondary distribution of signals using test cables is necessary.

3 The realization of dynamic signal distribution and processing can be seen from Figure 3, whether it is analog signal, I / O signal processing, or signal distribution are controlled by ispLSI1032. IPC realizes functions such as programmable amplifier gain control, pull-up resistor cut-in, and relay switching by writing data to the corresponding output terminals of the chip. At the same time, in order to ensure the testability of the test system itself, ispLSI1032 also has output pin testing and other functions. Its main functions can be summarized in three aspects:

1 Control of signal distribution circuit, display circuit, analog signal processing circuit and digital I/O signal processing circuit;

2 Self-checking module gives self-check code and module code;

3 has pin output data test function.

The control of signal distribution and other circuits is implemented using data latch groups, that is, each output control pin is assigned to the data latch, and is assigned a corresponding address, and the control data is latched to the corresponding output according to different addresses. foot.

The self-check code is set for detecting the signal preprocessing module to the IPC cable. When the IPC sends 55H (or AAH) through the AB line, the AH (or 55H) is sent back from the DB line, ie, the AB negation data. The module code is set for identifying each module. It is set by the hardware out of chip. The industrial controller reads out the corresponding line from the DB line. The output pin test function is used to detect the correctness of the ispLSI1032 output control data. The lines read back the data of each output pin.

To sum up the above, the ispLSI1032 circuit function can be illustrated by the block diagram shown in Figure 4. Each output control data is latched by 4 data latches and directly output to each pin; each pin of the data line adopts bi-directional tri-state control, the write data is connected with each data latch, and the read data is selected by data. The circuit gives, at the same time, in order to realize the detection of the output data, each output control pin also adopts the bidirectional way; The data selection circuit is controlled by the decoding circuit, respectively outputs the identification code, self-check code and 4 groups of output controls according to different addresses. Pin data. The internal data flow control signal of the IspLSI 1032 is generated by a decoding and input/output control circuit, including a data latch signal, a data selection control signal, and a three-state control signal of the data line input/output pin.

ispLSI1032 is a high density in-system programmable logic device produced by Lattice. Because its internal logic is determined by the user and can be modified in real time, there is great flexibility in application. Using Lattice's ispDesignEXPERT software to achieve its circuit design and download. In order to visualize the circuit function of the chip and simplify the design process, this paper adopts the “Schematic + HVDL language” method, divides the internal circuit of the ispLSI1032 into function modules according to the aforementioned functions, and gives the connection relationship of each function module in the schematic diagram mode, and then reuses. The VHDL language gives the logical description of each functional module.

In this paper, the dynamic allocation and dynamic processing of test signals effectively solve the problem of VXIbus test platform's adaptation to a variety of complex measured objects. Using ISP technology to control the system greatly simplifies the system structure and circuit design and improves the system reliability. The application results show that the system has a strong adaptability to the measured object and has achieved a test of nearly 40 combinations of an electronic device. At the same time, the system design adopts ISP technology, which simplifies system debugging and shortens the system development cycle. Its functional simulation and real-time simulation functions also ensure the correctness of the system logic.

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